1. Field of the Invention
The present invention relates to communication receivers and more particularly to a method and apparatus for minimizing spurious interference signals generated in a communication receiver.
2. Background Discussion
Communications systems in general and paging systems in particular using selective call signalling have attained widespread use for calling a selected paging system receiver by transmitting information from a base station transmitter to the paging receiver. Modern paging receivers have achieved multifunction capability through the use of microprocessors which allow the paging receiver to respond to information having various combinations of tone, tone and voice, or data messages. This information is transmitted using any number of paging coding schemes and message formats.
Numerous problems are associated with communications receivers in general and radio frequency (RF) paging receivers in particular in designing a receiver which can operate over a wide range of receive frequencies. Typically, paging receivers operate over a range from 35 MHz to 900 MHz. One of the problems associated with paging receivers is spurious interference signals, also known as self-quieting spurious response, which greatly affects receiver noise and sensitivity.
The receiver self-quieting phenomenon is caused by fundamental and harmonics of the receiver local oscillators either being at a frequency that the receiver is capable of responding to as though it were an incoming or intermediate frequency signal, or mixing together in any non-linear stages of the receiver to produce a frequency which the receiver is capable of responding to as though it were an intermediate frequency signal. These local oscillators can be of three types.
The first type of local oscillator is used to produce an intermediate frequency in the intermediate frequency stage of a communication receiver. The oscillator typically drives a frequency synthesizer capable of generating any one of a number of predetermined injection signal frequencies. In general, for every intermediate frequency, there is a local oscillator.
The second type of oscillator is found on receivers with digital circuitry. This oscillator is used to clock the digital circuitry which decodes data that has been modulated onto the incoming RF signal. The digital circuitry such as a microprocessor decodes the demodulated data in real time and uses this second type of local oscillator to establish an internal time base for decoding and processing the paging information.
The third type of local oscillator is typically an RC type oscillator used to perform various support functions for the paging receiver. There may be several of the third type local oscillators in the receiver. The support functions include a frequency base for a DC-DC converter, a frequency base for driving a multiplexed liquid crystal display, or an interval timer used has a watch dog or deadman timer for the microprocessor.
The receiver self-quieting phenomenon is perhaps best understood by first examining the phenomenon as a conventional dual conversion super heterodyne receiver such as the one shown in FIG. 1. In this system, an RF frequency input F.sub.rf first enter input 10 of the receiver's RF stages 12. These RF stages 12 may include amplification, matching, filtering networks, etc. as required by the system. In general, substantially the same RF frequency F.sub.rf will exit an output 14 of RF stages 12 and enter an input 16 of a first mixer 18.
A first local oscillator frequency F.sub.L01 is produced by a first local oscillator 20 having an output 22 operatively coupled to a second input 24 of first mixer 18. Oscillator 20 may be a conventional crystal controlled oscillator whose frequency is determined by a crystal 26. This oscillator crystal may be one of many such crystals which may be selectively coupled to oscillator 20 in order to provide the user with a plurality of receiver channels. Alternatively, oscillator 20 may be a frequency synthesizer which may generate and number of frequencies via frequency synthesis in order to provide the user with a plurality of receiver channels.
As is well known in the art, first mixer 18 will produce an output intermediate frequency F.sub.IF1 on output terminal 28 in accordance with the equation F.sub.IF1 -F.sub.RF -F.sub.L01 if the system uses low side injection to the first mixer or F.sub.IF1 =F.sub.L01 -F.sub.RF if the system utilizes high side injection at first mixer 18.
The first intermediate frequency F.sub.IF1 is applied to an input 30 of first IF stages 34. First IF stages 34 may include amplifiers and filters for processing the intermediate frequency signal F.sub.IF1 as necessary. In the preferred embodiment, first IF stages 34 includes a narrow-band crystal filter.
An output 32 of the first IF stages 34 is operatively coupled to an input 36 of a second mixer 38 thereby applying F.sub.IF1 thereto. A second local oscillator 40 provides a second local oscillator frequency F.sub.L02 at an output 42 to be applied to an input 44 of second mixer 38. Oscillator 40 is generally a fixed frequency oscillator having frequency F.sub.L02 determined by a single oscillator crystal 46.
A second intermediate frequency appears at an output 48 of mixer 38 and has frequency designated F.sub.IF2. The second local oscillator frequency F.sub.L02 is determined in accordance with the equation F.sub.IF2 =F.sub.IF1 -F.sub.L02 if low side injection is utilized for the second mixer and F.sub.IF2 =F.sub.L02 -F.sub.IF1 if high side injection is utilized for the second mixer.
This second IF frequency F.sub.IF2 is applied to an input 50 of second IF stages 5 where the signal is further processed and appears at an output 54 of the second IF stages. At this point, the signal is further processed by other circuitry as deemed necessary in accordance with the systems specifications and requirements. Most frequently, output 54 will drive a demodulator such as a frequency modulation (FM) discriminator.
It is often the case that the second IF stages 52 are utilized to obtain large quantities of gain at the second IF frequency F.sub.IF2. It is typical for second IF stages 52 to include amplifiers having gains in excess of 120 dB. Since the second IF frequency F.sub.IF2 is the lowest intermediate frequency in a dual conversion receiver system, it is most economical and advantageous to utilize the second IF stages 52 to obtain the majority of the system gain and selectivity.
As was stated earlier, the receiver self-quieting phenomenon is caused by fundamental and harmonics of any of the receiver's local oscillators either being at frequency that the receiver is capable of responding to as though it were an incoming signal, F.sub.RF, or intermediate frequency signal, F.sub.IF1 or F.sub.IF2, or mixing together in any non-linear stages of the receiver to produce a frequency which the receiver is capable of responding to as though it were an intermediate frequency signal, F.sub.IF1 or F.sub.IF2. When oscillator frequencies that satisfy the self-quieting criterion are inadvertently selected, the result is the presence of a signal in the receiver which causes the receiver to respond as though it is receiving an incoming signal. In an FM system, this can result in the receiver "capturing" itself while ignoring an incoming signal. This condition is known as receiver self-quieting. It is important to note, however, that this phenomenon occurs totally independent of any input external signal at frequency F.sub.RF. In a receiver with four local oscillators; two for the first type, F.sub.101 and F.sub.102, which are used for mixing and producing intermediate frequencies, one of the second type, F.sub.clk, which establishes a time base for digital decoding circuitry; and one of the third type, F.sub.dcdc, which is the frequency for a DC-DC converter, the receiver will respond as though it is receiving an incoming radio frequency signal if any of the following equations are satisfied: EQU F.sub.fr =I*F.sub.101 orJ*F.sub.102 orK*F.sub.clk orM*F.sub.dcdc
or EQU F.sub.if1 =(I*F.sub.101)+(J*F.sub.102)+(K*F.sub.clk)+(M*F.sub.dcdc)
or EQU F.sub.if2 =(I*F.sub.101)+(J*F.sub.102)+(KF.sub.clk)+(M*F.sub.dcdc)
where I, J, K, and M are integers. It can be appreciated that there are numerous combinations of frequencies that may be a problem to the receiver system designer. If only the first ten harmonics of the above frequencies are considered, there are 184,461 frequency combinations to consider. The combinations that result in self-quieting are limited to the products that fall within the bandwidth of the communication receiver, typically 25 KHz to 50 KHz for a paging receiver. For example, a combination resulting in a frequency of F.sub.rf +/-25 KHz, or F.sub.if1 +-25 KHz, or F.sub.if2 +/-25 KHz can result in a self-quieting spur with a 50 KHz bandwidth paging receiver.
The spurious signals generated by the first type of oscillator have been alleviated somewhat by driving the IF stages at multiples of the same frequency as disclosed by Victor in U.S. Pat. No. 4,551,856. However, complications increase for designing a receiver system capable of receiving a incoming frequency ranging from 35 MHz to 900 MHz. While no one receiver circuit may be capable of receiving over this range, a normal receiver with RF and IF circuit modifications may be required to receive over this frequency range. Also, while the accuracy of the first and second type oscillators can be confined to a range of less than +/-50 parts per million, the accuracy of the third type oscillator, such as the type in a DC-DC converter, even when accurately trimmed such as shown in U.S. Pat. No. 4,606,076, are not much more accurate than 72,000 parts per million over the operating environment of the receiver. To complicate matters further, more self-quieting spurious combinations are possible with another third oscillator type and third intermediate frequency and additional support circuit RC oscillators. Referring briefly to FIG. 4, there is a power spectra shown of the spurious interference caused by these oscillators in a multifunction paging receiver. As is evident, numerous spurious interference signals are generated by these type of oscillators.
Over the 35 MHz to 900 MHz incoming signal frequency range, several intermediate frequencies may be selected to design the receiver, depending upon the particular range of the incoming frequency. However, the clock frequency (F.sub.clk) for the digital decoder is held constant because the modulated data on the incoming signal is held at a fixed data rate. The clock frequency F.sub.clk may be trimmed over a very narrow frequency range in an attempt to remove spurious interference signals, however, changes in the clock frequency may cause the improper decoding of incoming data because of improper synchronization of the decoder to the incoming signal data rate. Inaccurate timing results in loss of data and can result in inoperation of the paging receiver. The DC-to-DC converter frequency is also typically fixed to optimize the efficiency of the conversion or to prevent harmonic radiation directly into an intermediate frequency stage.
In general, the final or last intermediate frequency is also held constant because of availability of common ceramic filtering devices. The system designer then attempts to optimize higher intermediate frequencies (if additional intermediate frequencies are required) and high side or low side injection techniques to minimize a self-quieting spur combination. This is typically done by selecting spur combinations where the spurs are the result of higher harmonics of the local oscillators. This is done because the energy in the harmonics decreases rapidly with increasing harmonics. If a self-quieting spur exists with the typically fixed final intermediate frequency stage and the fixed clock oscillator and DC-to-DC converter frequencies, considerable engineering effort is focused upon decoupling the decoder oscillator and DC-to-DC converters from the intermediate frequency section. This is often difficult in small portable receivers because of the close physical proximity of the circuitry.
The spurious interference signals created by the second and third type of oscillators are transported to the intermediate frequency stage by two mechanisms. The two mechanisms which cause coupling of the decoder clock and DC-DC converter clocks to the intermediate frequency stages are conduction and radiation interference. One skilled in the art will readily appreciate that even a very small signal level conducted along power supply lines or ground lines when amplified in the final intermediate frequency stage can severely interfere with proper operation of the receiver. Also, signals electromagnetically radiated onto the signal lines or inductive elements of the intermediate stages can severely interfere with the proper operation of the receiver. The coupling is typically reduced by improving bypassing of stages, changing power and ground current flows and shielding sensitive components from radiation. This process of reducing this coupling is typically an expensive and a time consuming part of the product development cycle.
After these problems are solved for the intermediate frequency, they must again (if necessary) be solved for each incoming frequency a pager is to operate on over the 35 MHz to 900 MHz range. This means solving these problems again for each new intermediate frequency and each new first local oscillator. This adds more time to the product development cycle and increases the cost of the product's development.